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How To Determine How the SFP+ Ports Map to the PHY Chips on S-Series and K-Series?

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TitleHow To Determine How the SFP+ Ports Map to the PHY Chips on S-Series and K-Series?
Objective
How to determine port to backplane mapping
Environment
  • S-Series
  • K-Series
Procedure
Use this section of show support to see the ASIC to port mappings, in this example TG.1.1-2 map to FUJI 0 and TG.1.3-4 map to FUJI 1 (Shown under the Fuji NIM Column):

"debug nim show info" output: 
NIM 2 (lower left):
Type: SNIM3 Pinatubo (4 Port 10G SFP+, 2X, Double-Wide Bottom)
Board Revision: 10 (0xA)
FPGA Type: Lava
FPGA Revision: 7 (0x7)
R/W Semaphore: 0x6ca1230 "vx show 0x6ca1230,1"
Phantom: no
FRU: no
Number Front Ports: 4
Num Logical Ports: 4
Mazama SPI Bus: 2
Mazama I2C Bus: 2
Number of NetProcs: 2
Fuji 0 (Mazama interface 2) connects to MAC 0 port 28
Fuji 1 (Mazama interface 2) connects to MAC 0 port 29
Number of MACs: 1
MAC 0: BCM56628
Number of PHYs: 2
PHY 0: BCM8727
PHY 1: BCM8727

Front | Sys |NIM | Mux|Fuji Num |MAC Num |PHY Num |PoE Num |Fabric
Port | Port|Port| Idx|NIM|MB |Port|NIM|MB |Port|NIM|MB |Port|NIM|MB |Port|Idx|Chn
---------|-----|----|----|---|---|----|---|---|----|---|---|----|---|---|----|---|---
tg.1.1 | 100 | 0 | NA | 0 0 0 | 0 8 27 | 1 17 1 |NA NA NA | 0 2
tg.1.2 | 101 | 1 | NA | 0 0 1 | 0 8 26 | 1 17 0 |NA NA NA | 0 2
tg.1.3 | 102 | 2 | NA | 1 1 0 | 0 8 14 | 0 16 1 |NA NA NA | 0 6
tg.1.4 | 103 | 3 | NA | 1 1 1 | 0 8 2 | 0 16 0 |NA NA NA | 0 6

This information can be seen in the output from a "show support" command, just search for the section "debug nim show info"
Additional notes
2X under the "Type" means the front panel oversubscribes the backplane by two times because there is only half as much bandwidth to the  backplane as compared  to the aggregate throughput of the front panel ports.

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