Reset Search
 

 

Article

After moving connection to new line card there are missing VPLS MAC Addresses on some VLAN resulting in traffic loss.

« Go Back

Information

 
TitleAfter moving connection to new line card there are missing VPLS MAC Addresses on some VLAN resulting in traffic loss.
Symptoms
Traffic loss seen on one of the VPLS instance when the circuit was moved to a new line card.
Found that the remote mac was learned but the local mac was not getting learned.

PC1--Local-Endpoint-(New connection)---4/1---MLX-A-e6/1-------MPLS----MLX-B--4/1---Remote-Endpoint--PC2

The new end point connection was done on module 4 of MLX-A. Module 4 is a newly inserted module.
On MLX4 we see that remote mac learned but the local mac was not learned.

telnet@MLX-A# sh mac vpls 240

Total MAC entries for VPLS 240: 1 (Local: 0, Remote: 1)

VPLS MAC Address L/R/IB Port Vlan(In-Tag)/Peer ISID Age Type
==== =========== ====== ==== ================= ==== === ====
240 001b.2bdf.92c9 R 6/1 10.2.1.13 NA 0 NA

Environment
Software Release: All
Fixed in Version: N/A
Cause
With further investigation it was found that the FPGA werein invalid state on this newly inserted module 4 on MLX-A. Due to this the local mac was not getting learned on this module.

SL 4: BR-MLX-1GFx24-X 24-port 1GbE SFP Module

Boot : Version 5.6.0T175 Copyright (c) 1996-2012 Brocade Communications Systems, Inc.
Compiled on Sep 20 2013 at 16:43:00 labeled as xmlprm05600
(423373 bytes) from boot flash
Monitor : Version 5.4.0T175 Copyright (c) 1996-2012 Brocade Communications Systems, Inc.
Compiled on Jun 15 2012 at 11:10:18 labeled as xmlb05400
(526710 bytes) from code flash
IronWare : Version 5.4.0cT177 Copyright (c) 1996-2012 Brocade Communications Systems, Inc.
Compiled on Mar 25 2013 at 17:15:04 labeled as xmlp05400c
(7227303 bytes) from Primary
FPGA versions:
WARN: Invalid PBIF Version = 4.02, Build Time = 8/26/2013 14:27:00

WARN: Invalid XPP Version = 1.01, Build Time = 9/6/2013 14:18:00

Valid STATS Version = 0.09, Build Time = 11/21/2010 14:52:00

BCM56512GMAC 0
BCM56512GMAC 1
666 MHz MPC 8541 (version 8020/0020) 333 MHz bus
512 KB Boot Flash (MX29LV040C), 16 MB Code Flash (MT28F128J3)
1024 MB DRAM, 8 KB SRAM, 286331153 Bytes BRAM
PPCR0: 1024K entries CAM, 16384K PRAM, 2048K AGE RAM
Resolution
Load the correct FPGA software and power cycle the line card.
Additional notes

Feedback

 

Was this article helpful?


   

Feedback

Please tell us how we can make this article more useful.

Characters Remaining: 255